RISC-V Linux Development in Full Swing
Most Linux users have heard about the open source RISC-V ISA and its potential to challenge proprietary Arm and Intel architectures. Most are probably aware that some RISC-V based CPUs, such as SiFive’s 64-bit Freedom U540 found on its HiFive Unleashed board, are designed to run Linux. What may come as a surprise, however, is how quickly Linux support for RISC-V is evolving.
“This is a good time to port Linux applications to RISC-V,” said Comcast’s Khem Raj at an Embedded Linux Conference Europe presentation last month. “You’ve got everything you need. Most of the software is upstream so you don’t need forks,” he said.
By adopting an upstream first policy, the RISC-V Foundation is accelerating Linux-on-RISC-V development both now and in the future. Early upstreaming helps avoid forked code that needs to be sorted out later. Raj offered specifics on different levels of RISC-V support from the Linux kernel to major Linux distributions, as well as related software from Glibc to U-Boot (see farther below).
The road to RISC-V Linux has also been further accelerated thanks to the enthusiasm of the Linux open source community. Penguinistas see the open source computing architecture as a continuation of the mission of Linux and other open source projects. Since IoT is an early RISC-V target, the interest is particularly keen in the open source Linux SBC community. The open hardware movement recently expanded to desktop PCs with System76’s Ubuntu-driven Thelio system.
Processors remain the biggest exceptions to open hardware. RISC-V is a step in the right direction for CPUs, but RISC-V lacks a spec for graphics, which with the rise of machine vision and edge AI and multimedia applications, is becoming increasingly important in embedded. There’s progress on this front as well, with an emerging project to create an open RISC-V based GPU called Libre RISC-V. More details can be found in this Phoronix story.
SiFive launches new Linux-driven U74 core designs
RISC-V is also seeing new developments on the CPU front. Last week, SiFive, which is closely associated with the UC Berkeley team that developed the architecture, announced a second gen RISC-V CPU core designs called IP 7 Series. IP 7 features the Linux-friendly U74 and U74-MC chips. These quad-core, Cortex-A55 like processors, which should appear in SoCs in 2019, are faster and more power efficient than the U540.
The new U74 chips will support future, up to octa-core, SoC designs that mix and match the U74 cores with its new next-gen MCU chips: the Cortex-M7 like E76 and Cortex-R8 like S76. The U74-MC model even features its own built-in S7 MCU for real-time processing.
Although much of the early RISC-V business has been focused on MCUs, SiFive is not alone in building Linux-driven RISC-V designs. Earlier this summer a Shakti Project backed by the Indian government demonstrated Linux booting on a homegrown 400MHz Shakti RISC-V processor.
A snapshot of Linux support for RISC-V
In his ELC presentation, called “Embedded Linux on RISC-V Architecture -- Status Report,” Raj, who is an active contributor to RISC-V, as well as the OpenEmbedded and Yocto projects, revealed the latest updates for RISC-V support in the Linux kernel and related software. The report has a rather short shelf life, admitted Raj: “The software is developing very fast so what I say today may be obsolete tomorrow -- we’ve already seen a lot of basic tool, compilers, and toolchain support landing upstream.”
Raj started with a brief overview of RISC-V, explaining how it supports 32-, 64-, and even future 128-bit instruction sets. Attached to these versions are extensions such as integer multiply/divide, atomic memory access, floating point single and double precision, and compressed.
The initial Linux kernel support adopts the most commonly used profile for Linux: RV64GC (LP64 ABI). The G and the C at the end of the RV64 name stand for general-purpose and compressed, respectively.
The Linux kernel has had a stable ABI (application binary interface) in upstream Linux since release 4.15. According to Raj, the recent 4.19 release added QEMU virt board drivers “thanks to major contributions from UC Berkeley, SiFive, and Andes Technology.”
You can now run many other Linux-related components on a SiFive U540 chip, including binutils 2.28, gcc 7.0, glibc 2.27 and 2.28 (32-bit), and newlib 3.0 (for bare metal bootstrapping). For the moment, gdb 8.2 is available only for bare-metal development.
In terms of bootloaders, Coreboot offered early support, and U-Boot 2018.11 recently added RISC-V virt board support upstream. PK/BBL is now upstream on the RISC-V GitHub page.
OpenEmbedded/Yocto Project OE/Yocto was the first official Linux development platform port, with core support upstreamed with the 2.5 release. Among full-fledged Linux distributions, Fedora is the farthest along. Fedora, which has done a lot of the “initial heavy lifting,” finished its bootstrap back in March, said Raj. In addition, its “Koji build farm is turning out RISC-V RPMs like any other architecture,” he added. Fedora 29 (Rawhide) offers specific support for the RISC-V version of QEMU.
Debian still lacks toolchain for cross-build development on RISC-V, but it’s already possible, said Raj. Buildroot now has a 64-bit RISC-V port and a 32-bit port was recently submitted.
Raj went on to detail RISC-V porting progress for the LLVM compiler and the Musl C library. Farther behind, but in full swing, are ports for OpenOCD UEFI, Grub, V8, Node.js, Rust, and Golang, among others. For the latest details, see the RISC-V software status page, as well as other URLs displayed toward the end of Raj’s ELC video below.