Tags: RISC-V

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CHIPS Alliance
Linux Foundation-hosted CHIPS Alliance will "host and curate" high-quality open source code relevant to the design of silicon devices.

CHIPS Alliance to Create Open Chip Design Tools for RISC-V and Beyond

The Linux Foundation and several major RISC-V development firms have launched an LF-hosted CHIPS Alliance with a mission “to host and curate high-quality open source code relevant to the design of silicon devices.” The founding members -- Esperanto Technologies, Google, SiFive, and Western Digital...
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RISC-V San Jose

The RISC-V Foundation will be hosting a free, Getting Started with RISC-V event in San Jose. This 1 day event will showcase innovative RISC-V implementations from members of the Foundation. The half-day San Jose event on April 4 will feature engaging presentations, demos and networking...
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RISC-V Irvine

The RISC-V Foundation will be hosting a free, Getting Started with RISC-V event in Irvine. This 1 day event will showcase innovative RISC-V implementations from members of the Foundation. The half-day Irvine event on April 3 will feature engaging presentations, demos and networking opportunities....
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RISC-V Austin

The RISC-V Foundation will be hosting a free, Getting Started with RISC-V event in Austin. This 1 day event will showcase innovative RISC-V implementations from members of the Foundation. The half-day Austin event on April 2 will feature engaging presentations, demos and networking opportunities....
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RISC-V Boston

The RISC-V Foundation will be hosting a free, Getting Started with RISC-V event in Boston. This 1 day event will showcase innovative RISC-V implementations from members of the Foundation. The half-day Boston event on April 1 will feature engaging presentations, demos and networking opportunities....
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Khem Raj
"This is a good time to port Linux applications to RISC-V,” said Comcast’s Khem Raj at an Embedded Linux Conference Europe presentation last month.

RISC-V Linux Development in Full Swing

Most Linux users have heard about the open source RISC-V ISA and its potential to challenge proprietary Arm and Intel architectures. Most are probably aware that some RISC-V based CPUs, such as SiFive’s 64-bit Freedom U540 found on its HiFive Unleashed board, are designed to run Linux. What may...
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Zephyr
Zephyr is now certified to run 100 boards spanning ARM, x86, ARC, NIOS II, XTENSA, and RISCV32 architectures.

Zephyr Project Embraces RISC-V with New Members and Expanded Board Support

The Linux Foundation’s Zephyr Project, which is developing the open source Zephyr real-time operating system (RTOS) for microcontrollers, announced six new members, including RISC-V members Antmicro and SiFive. The project also announced expanded support for developer boards. Zephyr is now...
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Develop your Linux Apps on This RISC-V Board

The “news” is that Microsemi and SiFive have collaborated on an expansion board that’s based on Microsemi’s RISC-V-based Polarfire FPGAs. The expansion board makes it easier for developers to write Linux-based applications targeting RISC-V using the Mi-V RISC-V ecosystem. RISC-V is a free and open...
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Using Open Source Designs to Create More Specialized Chips

Collaborating on freely available code enables companies and programmers to pool resources to solve common problems and avoid reinventing the wheel. Companies build competing products and services from these open source foundations that they might never have been able to build otherwise. But the...
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HiFive
SiFive has launched the HiFive Unleashed SBC, a Linux-driven RISC-V processor SoC. (Image courtesy: SiFive)

First Linux-Based RISC-V Board Prepares for Take-Off

It’s been two years since the open source RISC-V architecture emerged from computer labs at UC Berkeley and elsewhere and began appearing in soft-core implementations designed for FPGAs, and over a year since the first commercial silicon arrived. So far, the focus has primarily been on MCU-like...
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